The present invention relates generally to output buffers and, more particularly, to output buffers using voltage followers.
Output buffers are used for a variety of reasons including isolating loads from input voltages. An example of a known output buffer 10 is shown in FIG. 1. The output buffer 10 includes first and second insulated gate field effect transistors 12 and 14 connected in series between a source and ground. The output buffer 10 also includes third and fourth insulated gate field effect transistors 16 and 18 connected in series between the source and ground. The gates of the second and third insulated gate field effect transistors 14 and 16 receive an input signal IN, and the gates of the first and fourth insulated gate field effect transistors 12 and 18 receive an inverted form of the input signal IN. A load 20 is coupled between the junction of the first and second insulated gate field effect transistors 12 and 14 and the junction of the third and fourth insulated gate field effect transistors 16 and 18. As shown in FIG. 1, the load 20 includes a resistor 22 and a capacitor 24, where the resistor 22 represents a transmission line and its terminating resistor, where the capacitor 24 represents the capacitance of the line, and where the resistor 22 and the capacitor 2 are shown in parallel.
There are several problems associated with the output buffer 10. For example, the charging current provided by the output buffer 10 is xe2x80x9cpassivexe2x80x9d in nature. That is, the maximum current required to charge the capacitor 24 is limited to the current required for the prescribed voltage across the resistor 22. In the case of a low voltage differential signal (LVDS) buffer, this current may be 3.5 ma, for example. Because the speed of the output buffer 10 is dependent upon this charging current, the speed of the output buffer 10 is limited due to the limited charging current. Another problem with the output buffer 10 is that it produces objectionable ringing when driving inductance loads. Still another problem is that the differential voltage swing and the mid-point output voltage of the output buffer 10 are set by either a current source or a resistor which limits the accuracy of the output buffer 10.
The present invention is directed to an output buffer which addresses one or more of these problems.
In accordance with one aspect of the present invention, an output buffer comprises a voltage follower having a positive input, a negative input and an output coupled together, and a control input arranged to control an operational state of the voltage follower. The positive input is a reference voltage input of the voltage follower, and the output of the voltage follower is a load output of the voltage follower.
In accordance with another aspect of the present invention, an output buffer comprises first, second, third, and fourth voltage followers. The first voltage follower has a first positive input, a first negative input and a first output coupled together, and a first control input arranged to control an operational state of the first voltage follower. The first positive input is a reference voltage input of the first voltage follower, and the output of the first voltage follower is a load output of the first voltage follower. The second voltage follower has a second positive input, a second negative input and a second output coupled together, and a second control input arranged to control-an operational state of the second voltage follower. The second positive input is a reference voltage input of the second voltage follower, and the output of the second voltage follower is a load output of the second voltage follower. The third voltage follower has a third positive input, a third negative input and a third output coupled together, and a third control input arranged to control an operational state of the third voltage follower. The third positive input is a reference voltage input of the third voltage follower, and the output of the third voltage follower is a load output of the third voltage follower. The fourth voltage follower has a fourth positive input, a fourth negative input and a fourth output coupled together, and a fourth control input arranged to control an operational state of the fourth voltage follower. The fourth positive input is a reference voltage input of the fourth voltage follower, and the output of the fourth voltage follower is a load output of the fourth voltage follower.
In accordance with still another aspect of the present invention, an output buffer system comprises a voltage follower, a reference voltage, and a load. The voltage follower has a positive input coupled to the reference voltage, a negative input and an output coupled together, and a control input that controls an operational state of the voltage follower. The output of the voltage follower is coupled to one side of the load.